Young Engineer Sponsorship: The ARMMS RF & Microwave Society provides sponsorship for young engineers (28 or below) who have had papers accepted for presentation at each meeting. Sponsorship is £200 cash plus free attendance (including conference dinner and overnight accommodation). Potential candidates should identify themselves as eligible at time of submission and state their date of birth. This offer is limited to a maximum of 2 places per meeting.
Best Paper Award: The Steve Evans-Pughe prize is awarded to the best presenter at each meeting. The prize is sponsored by Cadence.
If you are interested in submitting a paper for presentation at this conference, please contact the technical coordinator (details below). Papers currently listed below are those already accepted. The deadline for submissions is 11th of October 2024. For exhibition enquiries please email exhibition@armms.org, for all other enquiries please email enquiries@armms.org
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The Cambridge Belfry
Back Lane
Cambourne
Cambridgeshire
CB23 6BW
| Web | https://www.thecambridgebelfry.co.uk |
Mark Ashcroft
| worstead.retreat@gmail.com |
A Comparison of Algorithms used in VNA Time-domain Transforms | |
| Matthew Ireland | |
| AAI Robotics Ltd, and Sidney Sussex College, University of Cambridge | |
Vector-network analyzers are frequency-domain measurement instruments, but can provide information about the time-domain response of a Device Under Test (DUT) through use of a linear transform. While the time-domain range and resolution are constrained by the parameters of the frequency-domain measurement, the choice of transform algorithm may impact the ability to resolve time-domain features through interpolation. Computational speed is also an important factor in choosing the transform algorithm, since this affects the practicality of the approach for real-time circuit analysis and debugging applications. This paper compares two methods commonly used in computing the VNA time-domain transform: the inverse Fast Fourier Transform (IFFT) and inverse Chirp-Z Transform. The key contribution of this work is the comparison of options for interpolation of the output of the transform, in order to enhance the ability to resolve features in the time-domain. We develop our analysis through simulation, and validate the results of the simulation by comparing measurements of discontinuities in transmission lines obtained using a VNA and using traditional TDR/TDT approaches. We also provide insights into some of the applications and the fundamental limitations of VNA time-domain transforms. | |
A Ka-band PA Module using Low-Cost SMT Packaged GaN PAs | |
| Liam Devlin | |
| PRFI | |
This paper describes the development of a Ka-band PA module that combines four SMT packaged GaN PA MMIC to produce an RF output power of 17W at 28GHz. The module covers 28 to 31GHz with a gain of 26dB and includes printed gain compensation circuitry to provide a flat gain versus frequency response. The PA MMIC is a low-cost composite GaN plus IPD (Integrated Passive Device) housed in a common 4mm x 4mm SMT package. The design, implementation and measured performance of the component will be described. The commercially available PA (CMX90A705A6) benefits from a low unit cost made possible by the use of the IPD output die allowing a much smaller GaN die compared to a single chip solution. | |
A Study on the Thermal Implications of Flip Chip Technology for mm-wave MMIC Amplifiers | |
| Thomas Young and Jonathan Leckey | |
| MMIC-Lab | |
Filp chip is an advanced semiconductor packaging technology which is well established for high density Silicon based integrated circuits. The advantages include reduced form factor, improved performance, higher density interconnects, better signal integrity and more reliable solder connections. For mm-wave applications, this technology can offer significant advantages over the traditional wire bond approach in terms of RF transition performance and assembly flow. A number of semiconductor foundries are now either offering or have roadmap plans for flip chip technology on both GaAs and GaN. In this paper we examine the thermal implications of using flip chip technology for mm-wave RF amplifiers and examine the various packaging solutions that are possible and how they align with end user application and implementation. | |
Accurate Broadband On-Wafer Noise Parameter Measurement with Dedicated 2GHz - 50GHz Passive Source Tuner: Measurement Uncertainty Contributions | |
| Afesomeh Ofiare | |
| Glasgow University | |
With all electrical circuit and devices, accurately characterising the noise parameters is essential to determine the device sensitivity to changes in the presented impedance at the source, relative to the noise figure. For unmatched (non-50 Ω) devices, these parameters are useful for further design process to achieve the lowest possible noise contribution from the device for applications particularly in communication systems. The ability to present the correct impedance at the source is dependent on precise tuner movement and broad gamma (Γ S ) range the tuner can achieve. This range and precise positions can be limited and/or shifted due to inaccuracies in setup which can lead to unprecise and poor tuner calibration, which would lead to greater measurement uncertainties and inaccurate noise parameters. In this paper we discuss some of the limitations and challenges to provide an insight into the contributing factors, trade-offs, and methods of reducing them to achieve accurate broadband noise parameter measurement data for unmatched on-wafer devices from 2 GHz to 50 GHz. We will show measurement repeatability over time of the noise parameters from a commercial HEMT transistor with stated NFmin of 1.5dB at 30 GHz, after eliminating measurement calibration uncertainties in measurement. | |
Advancements in Small Form Factor Components for Next-Generation AESA Systems | |
| Cameron Sheth | |
| Marki Microwave | |
AESA (or Active Electrically Steerable Arrays) are a type of phased array radar system. They are composed of transmit/receive modules, each corresponding to an antenna element, and are electronically streered by controlling the phase and amplitude of each module. These arrays can quickly grow in size with higher element arrays enabling higher resolution and improved beamforming. Higher element arrays require not only a higher number of antenna elements, but passive components such as filters and power dividers. In this paper, we will discuss the performance advantages offered by small form factor MMIC power dividers and why these power dividers are best suited for the development of next generation AESA systems. | |
Analyzing Isolation Network Dissipation in Solid-State Power Amplifiers | |
| Steve Huettner | |
| Cubic Nuvotronics | |
This presentation focuses on analyzing power dissipations in isolation resistors in solid-state power combiners using harmonic balance simulations in Microwave Office Electronic Design Analysis (EDA) software. This type of analysis must be performed to develop power handling specifications for power combiners for real-world conditions where combined signals may be out of phase, or when failures occur. In particular, dissipations due to amplifier phase imbalance, graceful degradation and load mismatch are addressed. Simple two-way and four-way Wilkinson structures are analyzed as examples, but the techniques described can be applied to any type or order of power combiner at any level of model fidelity. A simple, nonlinear amplifier model is used to simulate constituent power amplifiers. One limitation of the analysis is that load-pull effects cannot be predicted. However, internal reflection coefficients are examined, which provide insight into conditions that could create or mitigate load-pulling. | |
Fabrication Technologies for sub-THz Travelling Wave Tubes for High Capacity Wireless Links | |
| Claudio Paoloni | |
| Lancaster University | |
The growing demand of wireless data and the future integration of terrestrial and satellite networks requires new approaches to exploit wider frequency bands with new families of RF front end. The wide band available above 100 GHz can support channels with tens of gigabit per seconds. The high attenuation and short wavelength pose substantial challenges for a real deployment and the availability of long links. Travelling wave tubes have demonstrated more than one order of magnitude higher output power than solid state amplifiers at the same frequency and very high efficiency. Presently, only a few prototypes of sub-THz TWTs were produced. The three dimensional nature of TWTs and the impact of wavelength to dimensions make very difficult their fabrication with the required high accuracy and tolerances. This paper explores the main design and fabrication challenges for the production of sub-THz TWTs for wireless communications both terrestrial and space. Micro diffusion bonding, CNC micro-machining, high precision laser welding are among the main processes for the fabrication of TWT. | |
From Automation to AI: Optimising Phased Array Antenna Design with PYAEDT and HFSS | |
| Fatemeh Hoveizavi | |
| EDRMedeso | |
This paper explores the application of PYAEDT, a Python-based interface for automating ANSYS Electronics Desktop (AEDT), to the design and optimization of phased array antennas within the HFSS (High-Frequency Structure Simulator) platform. Phased array antennas are critical in modern communication systems, offering dynamic beam steering capabilities for applications in radar, wireless communications, and satellite systems. However, their design often involves complex electromagnetic simulations and iterative tuning processes, which can be time consuming. Using PYAEDT, we demonstrate how automation can simplify key aspects of the design workflow, from the initial configuration of array elements to full system optimization. This approach enables parametric studies, adaptive beamforming, and performance evaluations such as gain, directivity, and S-parameters, all while minimizing human error and computational overhead. Additionally, the paper presents a detailed case study where PYAEDT is used to optimize a phased array antenna for beam steering and radiation performance, highlighting significant improvements in design efficiency and accuracy. The results underscore the potential of PYAEDT to transform phased array design, making it more accessible and streamlined for engineers and researchers. By automating complex tasks within HFSS, the integration of PYAEDT allows for faster iterations and deeper insights into electromagnetic behaviour of advanced antenna systems. The next step involves leveraging these results to train AI tools capable of automating and further optimizing phased array antenna design, paving the way for even more efficient and intelligent design processes. | |
GaN MMICs: Investigating an Optimal Packaging Solution for SATCOM Power Amplifiers | |
| Eshan Azad | |
| CSA Catapult | |
In recent years, gallium-nitride (GaN) high-electron-mobility transistors (HEMTs) have become the preferred technology for high-frequency and high-power Monolithic Microwave Integrated Circuit (MMIC) power amplifiers (PAs) due to their high-power density and efficiency at microwave frequencies. The high-power density of GaN devices, however, has created challenges in designing efficient thermal management solutions to remove the excess heat generated by MMIC PAs, which have a smaller size and surface area. It is well known that elevated temperatures have an adverse impact on RF performance parameters, including gain, output power, and linearity. Consequently, it is imperative to develop robust thermal management systems to maintain a consistently stable operating temperature. The paper presents a simulation workflow for defining the optimal material selection for the die-attach and flange when packaging a GaN MMIC PA. A combination of thermal simulation and mechanical stress simulation was used to determine maximum junction temperature and stress as key metrics to compare different materials. The die-attached and flange materials were selected to reduce the junction temperature while minimising mechanical stress at the same time. | |
Methods to Mitigate Intermodulation of PIN Diode Circuits | |
| Farhad Ghorbani | |
| Liverpool University | |
As new communication systems strive to meet the escalating demand for high data rate transmissions, they encounter the challenge posed by the inherent non-linearity of RF components. The simultaneous presence of high-power transmission signals and weak received signals within certain RF components presents an unavoidable challenge in modern communication system design, where increased RF power typically leads to greater distortion. This phenomenon underscores the necessity for RF components to demonstrate a high degree of linearity, not only to prevent interference with the transmitted signal but also to safeguard the integrity of the received signal. Addressing this issue requires the identification and mitigation of all potential sources of non-linearity. This paper presents the recent endeavors of the High Frequency (HiFe) research group at the University of Liverpool, dedicated to uncovering and addressing the causes of passive intermodulation (PIM) and devising innovative strategies for its mitigation. Our comprehensive study spans several facets of PIM analysis, including the effects of metal-metal contact non-linearity, distortion characteristics of PIN diodes under different bias conditions, and the impact of various impedance and circuit topologies on PIM generation. We explore the manipulation of impedance, the optimization of circuit topology, and the application of a PIN diode-based PIM canceller as three effective methods to reduce PIM. Measurement setups and methodologies developed for this purpose are detailed, providing insights into our systematic approach toward minimizing PIM in RF components. Through this work, we contribute to the advancement of linear RF component design, facilitating the transmission of high-power signals without compromising the quality of received signals in advanced communication systems. | |
On-wafer S-parameter measurement of CPW devices based on high-resistivity silicon wafer from 220 GHz to 330 GHz | |
| Liam Ausden | |
| National Physical Laboratory | |
Accurate on-wafer S-parameter measurement is critical for the design and development of planar circuits for established and emerging applications, including communications, radar sensors, radio astronomy, and imaging for security and health. In this work, several coplanar waveguide (CPW) based structures, implemented on a high-resistivity silicon wafer, were measured in the WR3 band (220-330 GHz) using an on-wafer multi-line Thru-Reflect-Line (mTRL) calibration. The results are presented, and key sources of error are discussed. The same wafer was also measured by two labs across Europe in the WR3 band. An interlaboratory comparison of the results is presented and discussed in detail. This study provides insight into the quality of measurements achievable with on-wafer TRL calibration at frequencies as high as 330 GHz. | |
RIS Hardware Optimization at Extreme Incident Angles for mmWave Communication Application | |
| Dr Babar Abbasi | |
| Queens Belfast University | |
In this talk, we'll explore an innovative advancement in Reconfigurable Intelligent Surfaces (RIS) technology designed for next-generation wireless communication systems, specifically in the millimeter-wave (mmWave) n257 band. Our team has developed a cutting-edge reflective unit cells and modified versions that work efficiently even when signals hit it from extreme angles. The set of unit-cells uses a design with p-i-n diodes for precise control, allowing it to handle dual-polarization reflection and achieve impressive phase control across a wide frequency range. Our comprehensive simulations and measurements demonstrate RIS’s superior performance compared to existing solutions, making it a promising component for enhancing wireless networks. We will also learn how RIS technology could improve the efficiency and reliability of future wireless communication systems. | |
Uncertainties for Time-Domain and Time-Gated VNA Measurements: A New Paradigm for Microwave Metrology | |
| James Skinner | |
| National Physical Laboratory | |
Time-domain utilities on vector network analysers (VNAs) are routinely used to provide valuable insights into the temporal, or spatial, response of high frequency devices and networks. VNA measurements in the frequency-domain are transformed to the time-domain, where time-gates can be applied to isolate specific parts of the response. Here, a new technique is presented which introduces the propagation of measurement uncertainties into this process. The inclusion of measurement uncertainty information quantifies the reliability of the measurements which, in turn, enables informed decisions to be made concerning the performance of the device being measured. This approach enables new insights to be gained into the performance of devices and networks. Rather than devices being treated as ‘black boxes’, the internal structure can be analysed in an informed manner. Some examples of this technique are given, along with suggestions for potential applications in different areas of microwave technology. | |
Using FinFET to Design RF Circuits for Highly Integrated MIMO Systems | |
| Gabriele Devita | |
| EnSilica | |
Modern transceivers rely on the integration of MIMO systems to meet the link budget and mitigate interference. By enabling ‘digital radios’, based on RF-ADCs/DACs, FinFET is the ideal technology to design such devices. However, the power consumption of digital architectures is incompatible with applications having limited energy budget, as the energy-per-conversion increases exponentially when the converters operate above 1 GHz. Significant power can be saved by designing an analog frontend, converting the RF signal to an IF below 500MHz, before performing the transition to the digital domain. This paper focuses on the challenges of RFIC design using FinFet and provides practical rules to engineers handling the intricacies of FinFET design. | |
Companies booking two or more delegate places are able to take part in the commercial exhibition that accompanies the conference. Please note: there is a maximum of 20 exhibition tables at each meeting, these are offered on a first come basis. Booking two delegate places does not guarantee an exhibition space, please email exhibition@armms.org to check availability and reserve and exhibition space.
The society would like to thank Link Microtek for sponsoring the November 2024 meeting.
Contributions are invited with an emphasis on RF and microwave design, research, testing and associated subjects. An oral presentation will be made at the meeting and a written paper will be required for publication in the society digest, which is distributed to delegates at the meeting. Prospective speakers are requested to submit a title and a short abstract to the technical coordinator (see above) as soon as possible.
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